2009年11月25日星期三
Measurement of bonding strength
•Wire Pull Testing (WPT), or bond pull testing, is one of several available time-zero tests for wire bond strength and quality. It consists of applying an upward force under the wire to be tested, effectively pulling the wire away from the die.
•Wire pull testing requires a special equipment commonly referred to as a wire pull tester (or bond pull tester), which consists of two major parts:
(1) a mechanism for applying the upward pulling force on the wire using a tool known as a pull hook;
(2) a calibrated instrument for measuring the force at which the wire eventually breaks. This breaking force is usually expressed in grams-force. 
2009年11月15日星期日
2009年11月12日星期四
2009年11月11日星期三
BALL BONDING
What is ball bonding?
Ball bonding is a type of wire bonding, and is the most common way to make the electrical interconnections between a chip and the outside world as part of semiconductor device fabrication.
Ball bonding is a type of wire bonding, and is the most common way to make the electrical interconnections between a chip and the outside world as part of semiconductor device fabrication.
The comparison between gole and copper
Gold or copper wire can be used, though gold is more common because its oxide is not as problematic in making a weld. If copper wire is used, nitrogen must be used as a cover gas to prevent the copper oxides from forming during the wire bonding process. Copper is also harder than gold, which makes damage to the surface of the chip more likely. However copper is cheaper than gold and has superior electrical properties[citation needed], and so remains a compelling choice.
Almost all modern ball bonding processes use a combination of heat, pressure, and ultrasonic energy to make a weld at each end of the wire. The wire used can be as small as 15 µm in diameter — such that several welds could fit across the width of a human hair.
The introduction of capillary, the formation of ball by it and the process of wire bonding
A person upon first seeing a ball bonder will usually compare its operation to that of a sewing machine. In fact there is a needle-like disposable tool called the capillary, through which the wire is fed. A high-voltage electric charge is applied to the wire. This melts the wire at the tip of the capillary. The tip of the wire forms into a ball because of the surface tension of the molten metal.
The ball quickly solidifies, and the capillary is lowered to the surface of the chip, which is typically heated to at least 125°C. The machine then pushes down on the capillary and applies ultrasonic energy with an attached transducer. The combined heat, pressure, and ultrasonic energy create a weld between the copper or gold ball and the surface of the chip - which is usually copper or aluminum. All aluminum systems in semiconductor fabrication eliminate the "purple plague" (brittle gold-aluminum intermetallic compound) sometimes associated with pure gold bonding wire. This property makes Aluminium ideal for ultrasonic bonding. This is the so-called ball bond that gives the process its name.
Next the wire is passed out through the capillary and the machine moves over a few millimeters to the location that the chip needs to be wired up to (usually called the substrate). The machine again descends to the surface, this time without making a ball so that the wire is crushed between the substrate and the tip of the capillary. This time the surface is usually gold, palladium, or silver - but the weld is made in the same way. The resulting weld is quite different in appearance from the ball bond, and is referred to as the wedge bond, tail bond, or simply as the second bond.
In the final step the machine pays out a small length of wire and tears the wire from the surface using a set of clamps. This leaves a small tail of wire hanging from the end of the capillary. The cycle then starts again with the high-voltage electric charge being applied to this tail.
The process where wire is cut right after ball is formed is also called stud bumping. Stud bumping is used when stacking chips in system in package (SIP) modules.
The current state-of-the-art machines (as of 2003[update]) can repeat this cycle about 20 times per second. A modern ball bonder is fully automatic and is essentially a self-sufficient industrial robot, complete with a vision system, sensors, and complex servo systems.
IC Fabrication Process Steps
The fabrication of integrated circuits consiste basically of the following process steps:
* Lithography: The process for pattern definition by applying thin uniform layer of viscous liquid(photo-resist)on the wafer surface. The photo-resist is hardened by containing mask information.
* Etching: Selectively removing unwanted material from the surface of the wafer. The pattern of the photo-resist is transferred to the wafer by means of etching agents.
* Deposition: Films of the various materials are applied on the wafer. For this purpose mostly two kind of processes are used, physical vapor deposition (PVD) and chemical vapor deposition (CVD).
* Chemical Mechanical Polishing: A planarization technique by applying a chemical slurry with etchant agents to the wafer surface.
* Oxidation: In the oxidation process oxygen (dry oxidation) or HO (wet oxidation) molecules convert silicon layers on top of the wafer to silicon dioxide.
* Ion Implantation: Most widely used technique to introduce dopant impurities into semiconductor. The ionized particles are accelerated through an electrical field and targeted at the semiconductor wafer.
* Diffusion: A diffusion step following ion implantation is used to anneal bombardment-induced lattice defects.
Models describing the steps used in fabricating ICs have also been incorporated into process simulators. It is therefore quite possible today to ``build'' new semiconductor structures and predict their performance using these computer tools. The state of the art in such simulators is that they are indeed very useful, but can not completely replace real laboratory experiments, because the models used in the simulators are not complete in some cases, or are purely empirical in other cases.
As the models are improved with ongoing research, the simulators will become more robust and therefore more generally useful. There is great motivation to do this, because real laboratory experiments are very expensive and very time consuming, especially as chip technology continuates to advance.
* Lithography: The process for pattern definition by applying thin uniform layer of viscous liquid(photo-resist)on the wafer surface. The photo-resist is hardened by containing mask information.
* Etching: Selectively removing unwanted material from the surface of the wafer. The pattern of the photo-resist is transferred to the wafer by means of etching agents.
* Deposition: Films of the various materials are applied on the wafer. For this purpose mostly two kind of processes are used, physical vapor deposition (PVD) and chemical vapor deposition (CVD).
* Chemical Mechanical Polishing: A planarization technique by applying a chemical slurry with etchant agents to the wafer surface.
* Oxidation: In the oxidation process oxygen (dry oxidation) or HO (wet oxidation) molecules convert silicon layers on top of the wafer to silicon dioxide.
* Ion Implantation: Most widely used technique to introduce dopant impurities into semiconductor. The ionized particles are accelerated through an electrical field and targeted at the semiconductor wafer.
* Diffusion: A diffusion step following ion implantation is used to anneal bombardment-induced lattice defects.
Models describing the steps used in fabricating ICs have also been incorporated into process simulators. It is therefore quite possible today to ``build'' new semiconductor structures and predict their performance using these computer tools. The state of the art in such simulators is that they are indeed very useful, but can not completely replace real laboratory experiments, because the models used in the simulators are not complete in some cases, or are purely empirical in other cases.
As the models are improved with ongoing research, the simulators will become more robust and therefore more generally useful. There is great motivation to do this, because real laboratory experiments are very expensive and very time consuming, especially as chip technology continuates to advance.
THE BALL BANDING PROCESS
Some Pictures of Wire Bonding
capillary to produce dimensions
chip with ball wire bonding
another method: wedge bonding
the comparsion of wire bonding, tape automated bonding and filp-chip
the connection with silicon and so on
chip with ball wire bonding
another method: wedge bonding
the comparsion of wire bonding, tape automated bonding and filp-chip
the connection with silicon and so on
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